Mohsin Abbas

Briefly

Asst. Prof. Mohsin Abbas(Computer Engineering): 25 publications (+6 under review/in-press), H-index 15, holds 3 US patents, supervised > 5 Master Thesis and currently have 4 master thesis under supervision, supervised 1 PhD graduate and currently have 3 PhD students under supervision. He is a part of SoC Hub research center and has expertise in design high-throughput and energy efficient VLSI architecture for baseband processing for next generation wireless networks. Furthermore, his other areas of interest/expertise include Digital chip (ASIC) design, System of Chip (SoC) design and Compute-In-memory based accelerators, Information theory and wireless networks.

Research outputs and activities of the Supervisor

Research group

The System-on-Chip research group addresses SoC: design methodologies, tool development as well as SoC architectures and IP blocks for FPGAs and ASICs. The SoC Hub is a joint initiative between TAU and companies. The SoC Hub includes over 10 professors and their research groups with the expertise ranging from microelectronics devices to very large scale SoC integration. Since 2020 SoC Hub has taped out and sample-tested 500M transistor class of chips with very high TRL, relevant for industrial and edge IoT applications.

Research infrastructure

SoC Hub includes 100-core server machines for ASIC design and simulation, 20 very large High-Bandwidth Memory FPGA boards for prototyping and collaboration platform with CMOS ASIC technology PDKs. Physical testing facilities are part of RF and electronics labs. Manufactured chips are integrated with other components in the SiPFAB pilot line.